Most of power devices have recently been made of a semiconductor Si. However, it is impossible to expect a power device using the semiconductor Si to make remarkable progress in future since its performance approaches performance limit due to physical properties of Si. When the semiconductor SiC is used as a material of the power device, a miniature power device with low loss and high efficiency is obtained, thus enabling simplification of cooling. Therefore, the semiconductor SiC is greatly expected to serve as a next generation power semiconductor material in future.
When producing a device using SiC, local doping technology is indispensable. However, it is difficult to perform doping by a diffusion method, as the local doping technology to SiC, because of very small diffusion coefficient of impurities against SiC. Therefore, ion implantation technology as another local doping method functions as an important process. There is a need to perform high concentration doping by high dose ion implantation so as to form a low resistance layer in the device using SiC. However, high dose ion implantation into SiC at room temperature had a problem that an implantation layer becomes continuous amorphous and satisfactory recrystallization does not proceed even if high temperature annealing is performed, thus failing to form a low resistance layer.
In order to solve such problem, there exists high temperature implantation technology in which a sample is heated to about 200 to 800° C. during ion implantation. Because of being exposed to high temperature, a silicon dioxide (SiO2) film formed by a chemical vapor deposition (CVD) method is formed as an ion implantation mask used in high temperature implantation technology. In patterning of the ion implantation mask, a wet etching method using a photoresist as a mask, or a dry etching method such as a reactive ion etching (RIE) method is employed (see, for example, Patent Literature 1).
This process will be described with reference to FIG. 10. First, (1) a SiO2 film 22 is deposited on a SiC substrate 21 by a CVD method. Next, (2) a photosensitive resist 23 is formed on the SiO2 film 22. Then, (3) mask exposure and development, which constitute a conventional photolithography processing step, are performed to form a pattern of the photosensitive resist. Then, (4) the SiO2 film is etched with hydrofluoric acid or the like to thereby perform patterning of a desired SiO2 film. Then, (5) the photosensitive resist is removed by O2 ashing. Then, (6) ion implantation is performed, and (7) the SiO2 film is removed by a wet process using hydrofluoric acid or the like.
Since this ion implantation mask process is a very complicated and high cost process, a simple low cost process is needed. Use of a mask such as a SiO2 film may cause a problem that ions are implanted into the region other than an opening of the mask, through the mask, by performing high energy ion implantation.
In order to solve the problem of the former, there is disclosed a method in which a chemically amplified photoresist is applied as an ion implantation mask layer and ion implantation is performed at room temperature (see, for example, Patent Literature 2). In order to solve the problem of the latter, there is disclosed a method in which a metal thin film of titanium or molybdenum having high mask performance is applied as an ion implantation mask layer (see, for example, Patent Literature 3).
There is also disclosed technology in which a polyimide resin film is used as an ion implantation mask for the purpose of providing a method for producing a semiconductor device, which enables ion implantation performed by accelerating ions with high energy at high temperature, and is capable of easily implanting impurities into a semiconductor substrate, particularly a SiC semiconductor substrate, in a region selective manner, to a sufficient depth (see, for example, Patent Literature 4).